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2006 – Mark A. Horowitz
Dr. Mark Horowitz is accustomed as one of the arch advisers of his bearing in chip circuits and systems design.
The administrator of the Computer Systems Laboratory and Yahoo! Founders assistant of the academy of engineering at Stanford University, and arch scientist at Rambus, Inc., Dr. Horowitz’s contributions beset abounding areas. They accommodate computer architecture, semi-conductor memory, the architectonics and clay of high-performance and low-power VLSI circuits and systems, and ambit architectonics for high-performance abstracts links.
Dr. Horowitz’s antecedent assignment focused on creating high-performance VLSI accretion systems, alive both on architecture the basal CMOS ambit elements (adders, memories, etc.), as able-bodied as complete systems. He has overseen abounding processor architectonics efforts at Stanford, including MIPS-X, one of the aboriginal processors to accept an on-chip apprenticeship cache, TORCH, a statically-scheduled, superscalar processor, and FLASH, a adjustable DSM machine.
He is best accepted for his groundbreaking analysis on accelerated CMOS abstracts articulation interfaces abnormally for anamnesis access to high-performance computing, arresting processing systems and added uses. He and his acceptance abundantly added the bandwidth of I/O interface circuits, which are a above aqueduct in avant-garde accretion and arresting processing systems. This assignment on interface circuits for CMOS abstracts alteration and signaling links afflicted perceptions of anamnesis and added I/O interfaces and fostered a anarchy in the electronics industry. His studies of I/O appearance acclimation chip led to the architectonics of atypical phase-locked bend circuits, some of which are in boundless bartering use.
Dr. Horowitz additionally is internationally accustomed as a avant-garde in low-power VLSI circuits and systems. He was one of the aboriginal advisers to admit that ability burning would absolute the achievement of ample abstracts and arresting processing systems as CMOS technology was scaled to the abysmal submicron range. This compassionate prompted him to acquaint the abstraction of appliance assorted ability food and alignment circuits into analytical and non-critical clusters to abbreviate VLSI-processor ability dissipation. He and his acceptance additionally fabricated key contributions to the architectonics and appliance of adaptive voltage regulators for attention ability in agenda systems and their interfaces.
He is a Fellow of both the IEEE and the Association for Computer Machinery. He is a affiliate of IEEE Solid State Circuits Society advising board and a accomplished affiliate of its affairs and affairs committees.
Dr. Horowitz accustomed his bachelor’s and master’s degrees from the Massachusetts Institute of Technology and his doctorate from Stanford University, all in Electrical Engineering.
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